LOAD AND STORE INSTRUCTIONS

Load Accumulator
Organizational graphic tag to help group instructions

Mnemonic

 LD

Short and Long format of instruction



Description

The contents of the addressed core-storage location replace the contents of the accumulator. Contents of the addressed core-storage location are unchanged by the operation.


Before and after operation illustration

There are no addressing exceptions for the load accumulator instruction; all forms of addressing that are described under "Effective-Address Generation" apply to the LD instruction.


Indicators: The carry and the overflow indicators are not affected during an LD operation.



Examples


Load Accumulator
Assembler Language Coding Hexadecimal Value Description of Instruction
Label   Operation   F T    
21 25
  
27 30
   32 33   35..40..
    LD         DISP C0XX Contents of CSL at EA (I + DISP) are loaded into A
    LD     1   DISP C1XX Contents of CSL at EA (XR1 + DISP) are loaded into A
    LD     2   DISP C2XX Contents of CSL at EA (XR2 + DISP) are loaded into A
    LD     3   DISP C3XX Contents of CSL at EA (XR3 + DISP) are loaded into A
    LD   L     ADDR C400XXXX Contents of CSL at EA (Addr) are loaded into A
    LD   L 1   ADDR C500XXXX Contents of CSL at EA (Addr + XR1) are loaded into A
    LD   L 2   ADDR C600XXXX Contents of CSL at EA (Addr + XR2) are loaded into A
    LD   L 3   ADDR C700XXXX Contents of CSL at EA (addr + XR3) are loaded into A
    LD   I     ADDR C480XXXX Contents of CSL at EA (V in CSL at Addr) are loaded into A
    LD   I 1   ADDR C580XXXX Contents of CSL at EA (V in CSL at "Addr + XR1") are loaded into A
    LD   I 2   ADDR C680XXXX Contents of CSL at EA (V in CSL at "Addr + XR2") are loaded into A
    LD   I 3   ADDR C780XXXX Contents of CSL at EA (V in CSL at "Addr + XR3") are loaded into A

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