Execute I/O
Organizational graphic tag to help group instructions

Mnemonic

 XIO

Short and Long format of instruction



Description

Execute I/O is the only CPU instruction that can be used to service I/O devices. Operation for the short format of the instruction is identical to operation for the long format, except for addressing, which is performed in the normal manner (refer to "Effective-Address Generation" for details).

The four basic types of I/O operations, which are initiated by an execute I/O instruction by means of input/output control commands, are:

  1. Write. Sending data from core storage to an output device.
  2. Read. Receiving data into core storage from an input device.
  3. Control. An operation (peculiar to the specific I/O device involved) that generally does not involve data transfer. For example, moving the access mechanism in a disk-storage drive from one cylinder to another cylinder is a control operation. In some cases, a control operation prepares an I/O device for subsequent data transfer to or from core storage.
  4. Sense Status. Information that specifies the condition of an I/O device (such as the device is ready to be used or a printer is out of paper forms) must be obtained from the device and examined by the program so that subsequent operations can be carried out properly.

The execute I/O instruction does not in itself specify any of the preceding operations; they must be specified by input/output control commands (IOCC's).

The function of execute I/O is to address the appropriate IOCC. Then the CPU uses the addressed IOCC to specify the operation to the desired device. The IOCC operation is automatic once an IOCC has been accessed by an execute I/O instruction.

The IOCC must start at an even word address in core storage. Also, the contents of the accumulator must be saved (via programming) before an execute I/O instruction is executed. The reason for this is that the accumulator is used in the analysis of the IOCC; any data in the accumulator at the start of this analysis is destroyed by the IOCC information.


Indicators: The carry and overflow indicators are not affected as a result of execution of an execute I/O instruction.



Input/Output Control Commands (IOCC's)

The format of the IOCC is:

I O C C format: 16 bits, at an even location, for an address, 5 bits for the device, 3 bits for the function, 8 bits for a modifier.  In the Land of Mordor, where the Shadows lie.

The leftmost word of the IOCC is addressed during execution of the execute I/O instruction. The effective address generated by the execute I/O must be even. Consequently, the leftmost word of the IOCC must be located at an even-word location.

Specific fields in the IOCC are described in the following paragraphs. For descriptions of IOCC's for the various I/O devices, refer to the I/O device descriptions in this manual.


Address Field

The function of this 16-bit field depends on both the operation and the device specified. During data-transfer operations, the address field specifies the core-storage location of the word to be transferred to or from an I/O device.

With respect to the use of the address field, data transfers may be performed in either of two ways, depending upon the I/O device involved in the operation:

  1. Cycle steal
  2. Direct program control

In cycle-steal operations, initial information is sent to the I/O device. This initial information is sent as a result of an IOCC addressed by an execute I/O instruction. The cycle-steal I/O device then accesses core storage as required by any data transfers involved in the operation. This cycle-steal activity goes on independently of the program being executed in the CPU. Updating of the storage address that specifies each sequential core-storage location for each word of input or output data is handled independently of the CPU program. In the same manner, any data count that indicates the amount of data to be transferred is decremented automatically as the cycle-steal operations proceed.

On the other hand, in direct-program-control operations, updating of any data count or data-address information must be explicitly performed by the program. In other words, each time a data word is to be transferred, the address in the IOCC must first be updated to point to the word location in core storage that is to be used. Also, any data count must be program controlled so the operation is stopped when the required amount of data has been transferred. In direct program control, execution of an IOCC does not in itself cause automatic updating of either the data address or any associated data count. Such direct-program-control operations are applicable to certain devices that are not attached to the storage-access channel.

All devices attached to a storage-access channel (I or II) transfer data on a cycle-steal basis. (They do require direct program control, however, for control or sense operations.) Also, the single-disk drive (in the 1131 CPU Models 2, 3, and 4 only), the 1132 Printer Model 1 and 2, and the 2501 Card Reader Model Al or A2 use a cycle-steal, data-transfer method of operation. Refer to descriptions of the individual I/O devices and the storage-access channel for further details.


Device Field

This five-bit field identifies the I/O device to which the IOCC is directed. This field is also called device address, area code, or device code. The device-code assignments are:

Device Code (Binary)   Device
00001   Console keyboard and console printer
00010   1442 Card Read Punch
00011   1134 Paper Tape Reader and Paper Tape Punch
00100   CPU single disk storage
00101   1627 Plotter
00110   1132 Printer
00111   Console entry switches, program stop key, and interrupt run mode
01000   1231 Optical Mark Page Reader
01001   2501 Card Reader
01010   Synchronous Communications Adapter
01100   IBM System/7
10001   2310 Disk Storage, Drive 1, or 2311 Disk Storage Drive. Drive 1, Disk 1
10010   2310 Disk Storage. Drive 2, or 2311 Disk Storage Drive, Drive 1, Disk 2
10011   2310 Disk Storage, Drive 3, or 2311 Disk Storage Drive, Drive 1, Disk 3
10100   2310 Disk Storage, Drive 4, or 2311 Disk Storage Drive, Drive 1. Disk 4
10101   1403 Printer
10110   2311 Disk Storage Drive. Drive 1, Disk 5
10111   2311 Disk Storage Drive, Drive 2, Disk 1 through 5
11001   2250 Display Unit


Function Field

The primary I/O functions are specified by the three-bit function code:

Function Code   Function Specified
000   Not used
001   Write -- transfers a single word from core storage to an I/O unit. The address of the storage location is provided by the address field of the IOCC.
010   Read -- transfers a single word from an I/O unit to core storage. The address of the storage location is provided by the address field of the IOCC.
011   Sense Interrupt -- loads the accumulator with the interrupt-level status word (ILSW) for the level being serviced at the time it is issued. This command is common to all I/O devices; therefore, no device code is needed. (Refer to "I/O Interrupts" for a description of the ILSW's.)
100   Control -- causes the selected device to interpret the modifier and/or address fields as a specific control action.
101   Initiate Write -- provides the ability to initiate a write operation on a device or unit that subsequently makes data transfers from core storage via a data channel.
110   Initiate Read -- provides the ability to initiate a read operation on a device or unit that subsequently makes data transfers to core storage via a data channel.
111   Sense Device -- loads the accumulator with the device-status word (DSW) from the device that is addressed by the IOCC. The status indicators (conditions) that can cause interrupts are reset by modifier bits in the IOCC as follows: bit 15 (= 1) for the highest level interrupt for the device; bit 14 (= 1) for the next highest level, and so on.

Note. When, during execution of a sense device command, the device field addresses a device that is not in the system configuration, every position of the accumulator is set to zero (an all-zero device-status word is in the accumulator). Normally, when a device is in the system, this all-zero condition indicates that the device is ready and not busy. But, for a device that is not in the system, this indication is meaningless. No separate indication is given to indicate that a device is not in the system.


Modifier Field

This portion of the IOCC provides additional information for the device and function specified. Where modifier bits affect a command, they are defined in the command-description section in subsequent portions of this manual.


Examples

Execute I/O

Assembler Language Coding Hexadecimal Value Description of Instruction
Label   Operation   F T    
21 25
 
27 30
  32 33   35..40..
    XIO         DISP 08XX Execute IOCC in CSL at EA (I+DISP) and EA + 1
    XIO     1   DISP 09XX Execute IOCC in CSL at EA (XR1+DISP) and EA + 1
    XIO     2   DISP 0AXX Execute IOCC in CSL at EA (XR2+DISP) and EA + 1
    XIO     3   DISP 0BXX Execute IOCC in CSL at EA (XR3+DISP) and EA + 1
    XIO   L     ADDR 0C00XXXX Execute IOCC in CSL at EA (Addr) and EA + 1
    XIO   L 1   ADDR 0D00XXXX Execute IOCC in CSL at EA (Addr+XR1) and EA + 1
    XIO   L 2   ADDR 0E00XXXX Execute IOCC in CSL at EA (Addr+XR2) and EA + 1
    XIO   L 3   ADDR 0F00XXXX Execute IOCC in CSL at EA (Addr+XR3) and EA + 1
    XIO   I     ADDR 0C80XXXX Execute IOCC in CSL at EA (V in CSL at Addr) and EA + 1
    XIO   I 1   ADDR 0D80XXXX Execute IOCC in CSL at EA (V in CSL at "Addr+XR1") and EA + 1
    XIO   I 2   ADDR 0E80XXXX Execute IOCC in CSL at EA (V in CSL at "Addr+XR2") and EA + 1
    XIO   I 3   ADDR 0F80XXXX Execute IOCC in CSL at EA (V in CSL at "Addr+XR3") and EA + 1


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