Mnemonic
| LDX |
Description
The purpose of this instruction is to load the instruction-address register or an index register with a value. How this is done is dependent upon the format of the instruction. Whether the instruction-address register or an index register is specified is dependent upon the T bits (in either the short or the long format):
| T Bits (bits 6 and 7 of the instruction) | Register |
|---|---|
| 00 | Instruction address |
| 01 | Index-register 1 |
| 10 | Index-register 2 |
| 11 | Index-register 3 |
When the value is loaded into the instruction-address register, an unconditional branch occurs to the address loaded.
For the short-instruction format, the specified register is loaded with an expanded displacement. The displacement is from the displacement field in the instruction; the value of bit 8 in the instruction is propagated to the left to form the leftmost 8 bits of the word.
For the long-instruction format, when indirect addressing is not specified, the specified register is loaded with the value in the address field in the instruction.
When indirect addressing is specified, the contents of the word addressed by the address field are loaded into the specified register.
Indicators: The carry and overflow indicators are not affected during execution of an LDX instruction.
Examples
Load Index
| Assembler Language Coding | Hexadecimal Value | Description of Instruction | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Label | Operation | F | T | ||||||||
|
|
32 | 33 | 35..40.. | |||||||
| LDX | DISP | 60XX | Load expanded DISP into the Instruction Register | ||||||||
| LDX | 1 | DISP | 61XX | Load expanded DISP into Index Register 1 | |||||||
| LDX | 2 | DISP | 62XX | Load expanded DISP into Index Register 2 | |||||||
| LDX | 3 | DISP | 63XX | Load expanded DISP into Index Register 3 | |||||||
| LDX | L | ADDR | 6400XXXX | Load Addr into the Instruction Register | |||||||
| LDX | L | 1 | ADDR | 6500XXXX | Load Addr into Index Register 1 | ||||||
| LDX | L | 2 | ADDR | 6600XXXX | Load Addr into Index Register 2 | ||||||
| LDX | L | 3 | ADDR | 6700XXXX | Load Addr into Index Register 3 | ||||||
| LDX | I | ADDR | 6480XXXX | Load Contents of CSL at Addr into the Instruction Register | |||||||
| LDX | I | 1 | ADDR | 6580XXXX | Load Contents of CSL at Addr into Index Register 1 | ||||||
| LDX | I | 2 | ADDR | 6680XXXX | Load Contents of CSL at Addr into Index Register 2 | ||||||
| LDX | I | 3 | ADDR | 6780XXXX | Load Contents of CSL at Addr into Index Register 3 | ||||||
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