Shift Right Accumulator and Extension
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Mnemonic

 SRT

Short and Long format of instruction



Description

The contents of the accumulator and accumulator extension are shifted right, a bit at a time, as if these two registers made up a single 32-bit register. Bits shifted out of extension-position 15 are lost.

Bits shifted in the high-order end (bit 0) of the accumulator are the same value as the original sign bit (that is, the value of the bit in position 0 at the start of the operation). This type of shifting is called arithmetic shifting. An example of a right shift of two positions of a negative number is:

Shift Right Accumulator and Extension execution example

The number of positions shifted is specified by a shift count. Location of the shift count is determined by the T bits in the instruction:

T Bits (6 and 7)   Shift Count Location
00   Low-order six bits of displacement (in the shift instruction)
01   Low-order six bits in index-register 1
10   Low-order six bits in index-register 2
11   Low-order six bits in index-register 3

A value must be put into the shift-count location before the operation is started. The operation is ended when the specified number of shifts have been performed. The shift count, however, need be set up only once. After the operation is ended, the original shift count is the same as its initial value. (Decrementing of the count is performed in separate circuits.)

The maximum shift count that can be specified is 63 (111111 in binary). A right-shift of 32 propagates the sign bit from accumulator-position 0 into all positions of the accumulator and the accumulator extension.

A shift count of zero (000000 in binary) causes this instruction to perform as a no-operation: contents of the accumulator and extension remain unchanged.

Core storage is not addressed during execution of the shift-right-accumulator-and-extension instruction.


Indicators: The carry and overflow indicators are not affected during execution of the SRT instruction.


Examples

Shift Left Accumulator and Extension

Assembler Language Coding Hexadecimal Value Description of Instruction
Label   Operation   F T    
21 25
 
27 30
  32 33   35..40..
    SRT         DISP 18*X Contents of A and Q shift right the number of shift counts in DISP
    SRT     1     1980 Contents of A and Q shift right the number of shift counts in XR1
    SRT     2     1A80 Contents of A and Q shift right the number of shift counts in XR2
    SRT     3     1B80 Contents of A and Q shift right the number of shift counts in XR3
* This hexadecimal digit can be 8, 9, A, or B depending upon the desired shift count.

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