Mnemonic
MDX |
The purpose of this instruction is:
Note: In no case are the contents of the accumulator, its extension, the overflow indicator, or the carry indicator modified or changed.
A skip causes the program to skip over the next word in storage and go to the second word in sequence. This means that when this instruction could cause a skip it should be followed by a short-format instruction. If a long-format instruction were to follow, a skip would send the program to the second word in the instruction and a programming error would result. A skip does not occur if the contents of the modified location do not change sign or do not go to zero as a result of the modification.
Short-Format Description
The displacement is expanded to 16 bits by duplication of the sign bit eight positions to the left of the high-order position. The expanded displacement is added to the register specified by the tag bits of the instruction as follows:
Tag Bits | Operation | |
---|---|---|
00 | Displacement added to instruction-address register | |
01 | Displacement added to index-register 1 | |
10 | Displacement added to index-register 2 | |
11 | Displacement added to index-register 3 |
When the tag bits are 00, this instruction performs a no-operation or modifies the instruction-address register, depending on the value of the displacement. Because the instruction-address register contains the address of the next instruction, a displacement of zero accesses the next instruction. Any displacement results in a branch to the modified address. The displacement can be either positive or negative.
A typical operation is:
FFFF From XR1 +0004 Expanded displacement 0003 Result in XRl
Long-Format Description
Modification is accomplished according to the tag and modifier bits or indirect-address fields of the instruction. If the tag bits are 00, the expanded displacement (bits 8 through 15 of the first word of the instruction) is added to the contents of the storage location specified by the address field in the instruction. The displacement is expanded to 16 bits by duplicating the sign bit eight positions to the left of the high-order position. If the tag bits are not 00, the contents of the address field of the instruction are added to the contents of the index register that is specified by the tag bits.
Tag Bits | Index Register | |
---|---|---|
01 | 1 | |
10 | 2 | |
11 | 3 |
Indicators: The carry and overflow indicators are not affected by execution of a modify-index-and-skip instruction.
Examples
Modify Index and Skip
Assembler Language Coding | Hexadecimal Value | Description of Instruction | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
Label | Operation | F | T | ||||||||
|
|
32 | 33 | 35..40.. | |||||||
MDX | DISP | 70XX | Add expanded DISP to I (no skip can occur) | ||||||||
MDX | 1 | DISP | 71XX | Add expanded DISP to XR1 | |||||||
MDX | 2 | DISP | 72XX | Add expanded DISP to XR2 | |||||||
MDX | 3 | DISP | 73XX | Add expanded DISP to XR3 | |||||||
MDX | L | ADDR,DISP | 74XXXXXX | Add expanded positive or negative DISP to CSL at Addr (Add to memory) | |||||||
MDX | L | 1 | ADDR | 7500XXXX | Add Addr to XR1 | ||||||
MDX | L | 2 | ADDR | 7600XXXX | Add Addr to XR2 | ||||||
MDX | L | 3 | ADDR | 7700XXXX | Add Addr to XR3 | ||||||
MDX | I | 1 | ADDR | 7580XXXX | Add V in CSL at Addr to XR1 | ||||||
MDX | I | 2 | ADDR | 7680XXXX | Add V in CSL at Addr to XR2 | ||||||
MDX | I | 3 | ADDR | 7780XXXX | Add V in CSL at Addr to XR3 |
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